1. Field of the Invention
The invention relates to a surface pattern produced on a photosensitively coated substrate by a focussed laser beam, and a method and an apparatus for producing such a pattern. In particular, the invention is directed to methods and apparatus for producing structures of chromium on glass which are suitable for use as masks or reticles for photolithography in semiconductor production.
2. Description of Related Art
Masks and what are known as reticles with extremely accurate structures of chromium on glass substrates are used for the production of photolithographic structures or patterns in the production of semiconductors. A 5X reticle, that is to say a pattern or structure which is photographically reduced five fold on to the semiconductor wafer and which constitutes the most widespread type of mask in the near future may comprise a quartz plate measuring 150 mm.times.150 mm which has a structure of opaque chromium. The structure is formed by exposure to light or an electron beam of a photosensitive or electron-sensitive covering on the chromium film. The photosensitive or electron-sensitive covering is then chemically developed and the exposed part thereof is removed. In a subsequent etching operation, the chromium is etched away at the locations at which the covering has been removed and the chromium film which remains forms the pattern or structure.
The smallest line widths of known 5-fold reticles are about 2 microns. However the required level of accuracy is considerably higher. Admissible overlay errors, that is to say the admissible difference between the position of the edges of the chromium in identical reticles produced in two successive steps is to be of the order of magnitude of 0.05 micron.
Reticles are mainly used for the production of accurate structures or patterns in the semiconductor industry. However there are also many other applications, for example in the field of integrated optics, diffraction optics, computer-generated holograms, micro-machining of miniaturized sensors, optical information storage and superconducting devices. Other important applications are direct exposure of patterns on semiconductor wafers and pattern generation for large-area displays. The high costs of existing production equipment for surface patterns or structures with a sufficient degree of accuracy and in particular using electron beam reticle writers represent an obstacle to the development of new equipment in these little established areas, in particular in universities and smaller companies.
A common aspect of all known pattern generators is that the mask or reticle is described in a digital data bank containing a list of all structure or pattern elements with their geometrical data. Before the structures are written, the geometrical data are converted to the format which is used by the writing hardware. During that conversion operation the geometrical co-ordinates are truncated to the addressing resolution of the hardware, that is to say the writing address grid.
An approximation error of 0.25 micron will occur when the address grid is 0.5 microns. This may be acceptable if the structures are designed with this grid in mind and never rescaled. However operations such as for example uniform scaling of a structure by for example 93%, the provision of a process bias or a predetermined process error range, such as an increase in the dimension of all elements in order to compensate for dimensionally inadequate etching during the operating procedure, of for example 0.15 micron, or displacement of the structure or surface pattern by an additional distance, give rise to unpredictable approximation errors which appear in the structure.
An address grid which is sufficiently fine to make the approximation error insignificant is required in order for those operations or process steps to be possible. In addition a finer grid allows the structure to be produced independently of the machine employed, which is used to write the pattern. That is desirable as designing and production of masks take place in different production locations. Preferably the approximation error should be less than 0.05 micron for 5X reticles.
Most modern pattern generators use a raster scan principle with a scanning beam which is either an electron beam or a laser beam and which is deflected along parallel lines on the substrate which is covered with a radiation-sensitive covering. The beam is switched on and off in dependence on a bitmap for the structure, which is stored in the control system. Another option is that the beam is produced during a writing time which is derived from data stored in an intermediate compressed format.
For a pattern or surface structure with an address grid or raster of 0.5 micron, it is possible to produce a bitmap with a bit for each grid point, a digital bit for each pixel, i.e., each individually controllable area element. Normal writing speeds are from 5 through 10 square millimeters per second, which corresponds to a reasonable data rate of from 20 through 40 Mbits per second with a data volume of from 10 through 100 Gigabytes per mask. By means of suitable data compression algorithms it is possible to store the compressed data on a fixed disc and to expand it to the full data volume at the time of writing. In addition the data rate is compatible with commonly used families of integrated circuits and commercially available electro-optical and acousto-optical modulators.
In principle a pattern with an addressability of 0.05 micron could also be written with scan lines at a spacing of 0.05 micron and with a pixel spacing of 0.05 micron along the scan line. However a bitmap with a 0.05 micron grid and a surface cover rate as referred to above corresponds to a data rate of 2-4 Gbits per second. It is not possible to modulate a single writing beam at that rate. In addition the data volume is one hundred times greater than for the 0.5 micron grid and is fairly unmanageable. Even real-time expansion from the compressed data format is impracticable as the flow of data would choke the data buses of most processors. Technological limitations in regard to modulation rate and data flow would severely limit the writing speed and make it impossible to use a reticle writer with a full pixel map with a 0.05 micron address grid.
While it is possible for masks and reticles to be produced by means of an X-Y scanning device, see for example U.S. Pat. No. 4,060,816, that device is too slow for example a practical use in the production of masks.
Simple mechanical scanning in the X- and Y-directions results in an unsuitable throughput, but it is possible to use a sub-scanning principle in order to increase the writing speed, see for example U.S. Pat. No. 4,455,485.
It is possible to produce a finer address grid with a fixed coarse writing grid if the surface is scanned a plurality of times, as for example in British patent specification No. 2,215,553. Successively written grids can be disposed one above the other with a small amount of displacement so as to increase the density of the resulting grid. Another possible way of improving the degree of address resolution involves carrying out the writing operation a plurality of times with a bitmap which is modified on each occasion so that some pixels are written twice while other pixels are written only once. As the focal spot is larger than the spacing between the pixels, exposure is a smooth function which covers the individual pixels. A structure or pattern element has edges from which the exposure increases smoothly from zero to full exposure. The addition of a row of half-intensity pixels has the effect of displacing the intensity profile by half a pixel spacing. Writing a 0.5 micron grid four times, using the original position twice and twice using a position which is displaced by 0.25 micron, gives an effective address grid of 0.125 micron, in accordance with the procedure set forth in above-mentioned British patent specification No. 2,215,553. That gives an effective address grid which is four times smaller than the hardware grid, but that procedure requires four writing passes over the surface.
In video displays, it is possible for picture elements to be positioned at pixel fractions by using what is known as the `antialiasing` procedure (see IEEG CG+A, January 1981, pages 40 through 48). The image which can be generated from a digital data bank is sampled at fictional sub-pixel positions. The sampled sub-pixel data are smoothed over a plurality of true pixels and the smoothed, that is to say spreadout, data from each sub-pixel are added at the true pixel positions. The eye interprets the resulting blurred transitions as sharp edges and the apparent position of edges can be altered in small fractional pixel increments by modification of the dosage at the pixel locations. Furthermore, run length encoding, often referred to as RLE, is a suitable data compression algorithm for pixel data which contain long sequences of individual values. The volume of the compressed data is a function primarily of the number of transitions from one value to another and back again and depends to a slight degree on the level of bitmap resolution.